1. Field of the Invention
The present invention relates to a dicing tape and a method of dicing a semiconductor wafer wherein the dicing tape is used.
2. Description of the Related Art
In successive steps of manufacturing semiconductor chips, in a dicing step a dicing tape is used to fix a semiconductor wafer thereon, and the semiconductor wafer is then cut into individual chips. The dicing step is followed by expanding, picking-up and mounting steps.
In the expanding step, the dicing tape is expanded to thereby expand or extend the widths of dicing lines or cutting lines formed in the dicing step and thus enlarge the spacing of the chips. The purpose of enlarging the spacing of the chips in the expanding step is to enhance a recognizability of the chips and to prevent the chips from coming into contact with adjacent chips and being damaged, when picked up in the picking-up step.
Nowadays, in the expanding step an expanding apparatus is used to stretch the dicing tape. In such an expanding apparatus, a stretching amount and a torque applied to stretch are generally set at constant levels. It is extremely cumbersome to adjust the expanding apparatus by changing the stretching amount or the torque, each time a type of dicing tape to be treated is changed, or a size of a semiconductor wafer attached to the dicing tape is changed.
Under the above circumstances, when a substrate material of a dicing tape stretched on the expanding apparatus has a high ductility, a stretching stress is not conveyed to an area where a semiconductor wafer is attached, and thus the spacing of the chips is not sufficiently enlarged. To the contrary, when a substrate material of a dicing tape being stretched has a low ductility, a stretching torque applied by the expanding apparatus becomes insufficient, the spacing of the chips is nonuniformly enlarged, or the dicing tapes may be broken.
Japanese Patent Laid-open Publication (Kokai) No. 8-124881 discloses a dicing tape having a three-layered construction; a pressure-sensitive adhesive layer as an uppermost layer, an intermediate sheet layer having a low ductility, and a base layer having a high ductility. Nevertheless, when said three-layered dicing tape is used in a conventional manner, dicing lines are not formed in a peripheral area around the central portion where a semiconductor wafer is attached. The peripheral area is also stretched together with the central portion where dicing lines are formed, and therefore, a stretching torque applied by the expanding apparatus becomes insufficient, or in some cases the dicing tapes may be broken.
As a pressure-sensitive adhesive coated on a surface of a dicing tape, not only general-purpose pressure-sensitive adhesives, but also ultraviolet (UV)-curable pressure-sensitive adhesives are widely used. A general-purpose pressure-sensitive adhesive has a modulus of elasticity of 104 to 106 N/m2, whereas a modulus of elasticity of an UV-curable pressure-sensitive adhesive is raised to 107 to 109 N/m2, after irradiation with ultraviolet rays. When the pressure-sensitive adhesive has a high modulus of elasticity, it deforms slightly when thrust upward by a thrusting needle in the picking-up step, and the picking-up procedure can be shortened, and thus, pollution of a back surface of a chip is reduced. However, an expanding apparatus is required to have a high torque for enlarging the spacing of the chips. When the pressure-sensitive adhesive has a low modulus of elasticity, a stress applied to a dicing tape in the expanding step is relaxed by a deformation of the pressure-sensitive adhesive, and thus the stress is not sufficiently conveyed to the dicing lines, and therefore, a sufficient spacing of the chips is not obtained.
Accordingly, the object of the present invention is to remedy the defects in prior art, and provide a dicing tape which can uniformly and sufficiently enlarge dicing lines without affect by a modulus of elasticity of a pressure-sensitive adhesive, and is rarely broken at the dicing lines.
Another object of the present invention is to provide a method of dicing a semiconductor wafer wherein the dicing tape is used.
Other objects and advantages will be apparent from the following description.
In accordance with the present invention, there is provided a dicing tape comprising a substrate sheet and a pressure-sensitive adhesive layer formed on one surface of the substrate sheet, wherein the substrate sheet comprises an upper layer in direct contact with the pressure-sensitive adhesive layer, an intermediate layer adjacent to the upper layer, and a lower layer adjacent to the intermediate layer, and an anti-extensibility (A) of the upper layer, an anti-extensibility (B) of the intermediate layer, and an anti-extensibility (C) of the lower layer satisfy the equation (I):
B less than Axe2x89xa6Cxe2x80x83xe2x80x83(I),
the anti-extensibility being a product of a modulus of elasticity and a layer thickness.
Preferably, the anti-extensibility (A) of the upper layer, the anti-extensibility (B) of the intermediate layer, and the anti-extensibility (C) of the lower layer satisfy the equation (I):
B less than Axe2x89xa6Cxe2x80x83xe2x80x83(I),
and at the same time further satisfy the equations (II) and (III):
0.4xe2x89xa6A/Cxe2x89xa61xe2x80x83xe2x80x83(II),
and
B/Cxe2x89xa60.5xe2x80x83xe2x80x83(III).
In a preferable embodiment of the present invention, the upper layer comprises two or more sublayers, and a whole anti-extensibility (A) of the upper layer is a sum of a product of a modulus of elasticity and a layer thickness of each sublayer constituting the upper layer.
In another preferable embodiment of the present invention, the lower layer comprises two or more sublayers, and a whole anti-extensibility (C) of the lower layer is a sum of a product of a modulus of elasticity and a layer thickness of each sublayer constituting the lower layer.
Further, in accordance with the present invention, there is provided a method of dicing a semiconductor wafer into individual chips which comprises:
(a) attaching the semiconductor wafer to a pressure-sensitive adhesive layer formed on one surface of a substrate sheet of a dicing tape wherein the substrate sheet comprises an upper layer in direct contact with the pressure-sensitive adhesive layer, an intermediate layer adjacent to the upper layer, and a lower layer adjacent to the intermediate layer, and an anti-extensibility (A) of the upper layer, an anti-extensibility (B) of the intermediate layer, and an anti-extensibility (C) of the lower layer satisfy the equation (I):
B less than Axe2x89xa6Cxe2x80x83xe2x80x83(I),
the anti-extensibility being a product of a modulus of elasticity and a layer thickness, and thereafter,
(b) dicing the semiconductor wafer with a dicing blade in such a manner that the upper layer is completely cut through from a top surface to a back surface, the intermediate layer is partly cut from a top surface to an inner point therein, and the lower layer is not cut.
The term xe2x80x9cmodulus of elasticityxe2x80x9d as used herein means a proportionality constant (E) in the proportionality:
T=Excex5
when the proportionality holds true between a stress (T) and a strain (xcex5) in an extension deformation. The term xe2x80x9cmodulus of elasticityxe2x80x9d is a constant also referred to as Young""s modulus. The modulus of elasticity can be determined by carrying out a tensile test using a tensile tester and calculating from a resulting tensile strength and an extension chart. The tensile tester, TENSILON/UTM-4-100 (Orientec Corporation), was used to determine the actual values disclosed herein with regard to the modulus of elasticity.
The term xe2x80x9canti-extensibilityxe2x80x9d as used herein means a value obtained by multiplying a xe2x80x9cmodulus of elasticityxe2x80x9d of a sheet material constituting a layer by a xe2x80x9cthicknessxe2x80x9d of the sheet material constituting the layer. For example, the anti-extensibility of the upper layer is a value obtained by multiplying a xe2x80x9cmodulus of elasticityxe2x80x9d of an upper layer by a xe2x80x9cthicknessxe2x80x9d of the upper layer. When the upper or lower layer is composed of two or more sublayers, a sum of anti-extensibilities of sublayers constituting the upper or lower layer corresponds to an anti-extensibility of the whole upper or lower layer.